Venkataramana Gangasani
Principal Engineer (Director) @Samsung Semiconductor
San Jose, CA, US
EMAILS
MOBILE NUMBERS
+91 *********19
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WORK HISTORY
Feb 2025 — Present
Principal Engineer (Director) @Samsung Semiconductor
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San Jose, CA, US
HBM - Base and Core die design
EDUCATION
N/A
IIT Madras, Chennai
MTech
N/A
JNT University Hyderabad
Bachelor of Technology - BTech
ABOUT VENKATARAMANA GANGASANI
Experience in HBM/DRAM/NAND Flash/PCM(3D-XP) Memory Core, High speed Interface/IO/Data path/Command path, Analog/Digital, Fullchip, Semiconductor Circuit Design.And, D4/D5/LP4/LP5/G6 DDR Die size, Cost per Gb, Bit growth Estimations.
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