Venkata Pradeep Chandra Akkinapalli
Sr. Silicon Design Verification Engineer at Google India Pvt. Ltd
- Role
- Sr Silicon Design Verification Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Venkata Pradeep Chandra Akkinapalli
I have 10+ years of experience in semiconductor industry primarily focusing on front-end Design verification of SoC/Sub-system/ VIP development, ARM coresight debugging with JTAG, Post silicon debug support along with formal verification- I would request you to go over the recommendations section as well to know about my expertise and working style- Currently working in Google on the front end verification of both Sub-system and SoC- Prior to Google, Worked as a consultant at Analog devices, handled design verification and post silicon support roles for various automotive chips for almost 3 generations- I was responsible for SRAM, NVM OTP memory controller verification, system security, JTAG boot for various automobile chips in Analog devices India pvt. ltd- Prior to ADI, Was part of Bluetooth verification IP development team at Aceic, handled TB and reference model development for BLE v5, v4.2 versions.I have completed M.Tech Degree in VLSI Design from Vellore Institute of Technology(VIT) Vellore, Tamil Nadu, India. I also have B-Tech degree in Electronics and Communication Engineering from JNT University, Kakinada, Andhra Pradesh, India.
Experience
Sr Silicon Design Verification Engineer
May 2025 — Present · Bengaluru, IN
Education
JNV SCHOOL,SRIKAKULAM
10TH CLASS
2005 — 2006
Vellore Institute of Technology
Master of Technology - MTech, VLSI Design
2013 — 2015
NARAYANA JUNIOR COLLEGE,VISAKHAPATNAM
INTERMEDIATE
2006 — 2008
ADITYA INSTITUTE OF TECHNOLOGY AND MANAGEMENT
Bachelor of Technology (B.Tech.), Electronics and Communication Engineering
2008 — 2012
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