Venkata Kandala
Asic Engineer @SK hynix memory solutions America Inc.
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WORK HISTORY
Asic Engineer @SK hynix memory solutions America Inc.
San Jose, CA, US
Worked on Memory subsystem including DDR4/DDR5 Memories for SSD. Also worked on flash controller sub system blocks
EDUCATION
Rochester Institute of Technology
ME, Microelectronics
PSG College of Technology
VLSI DESIGN
ABOUT VENKATA KANDALA
Hardware design verification engineer with nearly 5.5 years of experience. My experience varies from designing Test Bench from scratch up to the chip level. Expertise in Systemverilog, Verilog, OVM and UVM.Sound knowledge of Functional Verification principles and Digital System Design.Proficient in writing fully Automated and Reusable Testbench.Proficient in writing BFM, Monitor, Driver, Checker, Testcontrollers, Functional Coverage collector, Layered Testbench and High level Abstraction Verification environment.Making Verification plans and verifying IPs.Code coverage, Functional coverage and Netlist simulation.Active member in OVM/UVM Forums of https://verificationacademy.com
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