Veerraju Masimukkula
Senior Manager - Asic Design @Alphawave Semi
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WORK HISTORY
Senior Manager - Asic Design @Alphawave Semi
EDUCATION
Indian Institute of Technology, Bombay
M.Tech, Microelectroincs and VLSI
Jawaharlal Nehru Technological University
B.Tech, Electronics and Communication Engineering
SKILLS
ABOUT VEERRAJU MASIMUKKULA
14+ years of experience in end to end DFT, including scan architecture, scan insertion, scan verification, ATPG, coverage analysis, IOBIST, MBIST, JTAG, pattern delivery, pattern bring up, debug, validation, and Single Chain Mode validation and bring up.> Lead and Manage teams successfully in executing and delivering on time quality deliverables.> Involved in many SoC tapeouts from 40nm to 3nm.> Worked closely with testing teams in validating and debugging the test vectors. Debugged many silicon issues like high current spikes, dynamic voltage drop etc.> Worked with design and PD teams in defining test constraints and timing closure.> Developed multiple scripts to automate TPG, package simulations, power aware simulations etc.
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