Veeresh Hugar
SMTS, Layout Design Manager at Texas Instruments
- Role
- Layout Design Manager at Texas Instruments
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Veeresh Hugar
Have experience in working on Custom products: Have experience in understanding…
Experience
Layout Design Manager
Jan 2017 — Present · Bangalore, IN
Education
Visvesvaraya Technological University
BE
2002 — 2006
Skills
- Perl
- Eda
- Semiconductors
- Mixed Signal
- Soc
- Drc
- Agilent Ads
- Very-Large-Scale Integration (Vlsi)
- Asic
- Pll
- Cadence Virtuoso
- Application-Specific Integrated Circuits (Asic)
- Physical Verification
- Vlsi
- Integrated Circuit Design
- Verilog
- Hercules
- Analog
- Layout
- Lvs
- Cadence
- Ic
- Physical Design
- Cmos
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