Veena V.

CDAC | FPGA/RTL Design Engineer | M. Tech @IIST

Role
Centre for Development of Advanced Computing (C-dac) at Centre For Development Of Advanced Computing C-Dac
Location
Kanchipuram, TN, IN
LinkedIn followers
500 followers
Information TechnologyView LinkedIn profile

About Veena V.

Recent Master\'s Graduate with interest in RTL development for ASICs and FPGAs.Familiar…

Experience

  1. Centre for Development of Advanced Computing (C-dac)

    Centre For Development Of Advanced Computing C-Dac

    Present

Education

  • University college of Engineering, Kanchipuram

    Bachelor of Engineering - BE, Electronics and Communications Engineering

    2017 — 2021

  • Indian Institute of Space Science and Technology

    Master of Technology - MTech, VLSI and Microsystems

Find verified contacts for anyone on LinkedIn

Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.

Free plan included · No credit card required

This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.

Veena V. — Centre for Development of Advanced Computing (C-dac) at Centre For Development Of Advanced Computing C-Dac in Kanchipuram, TN, IN | Unifers