Vedhant Abrol
Senior engineer @Samsung Semiconductor| M.Tech (VLSI Design) | IIT JMU
- Role
- Senior Engineer at Samsung Semiconductor
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Vedhant Abrol
I’m Vedhant Abrol, an ASIC RTL Design Engineer at Samsung Semiconductor, working on…
Experience
Senior Engineer
Aug 2025 — Present · Bengaluru, IN
Education
Indian Institute of Technology Jammu
Master of Technology - MTech, VLSI DESIGN
Government College of Engineering and Technology, Jammu
B.E, Electrical, Electronics and Communications Engineering
2018 — 2022
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.