Vasubabu Ravipati

Experience

1. Dft

   Arm

   Oct 2025 — Present · Bangalore Urban, IN

Education

• Jawaharlal Nehru Technological University

  B.Tech, Eelectronics and Communocations

  1996 — 2000

Skills

• Very-Large-Scale Integration (Vlsi)
• System on a Chip (Soc)
• Soc
• Rtl Design
• Systemverilog
• Atpg
• Tcl
• Analog
• Integrated Circuits (Ic)
• Application-Specific Integrated Circuits (Asic)
• Field-Programmable Gate Arrays (Fpga)
• Physical Design
• Fpga
• Formal Verification
• Vlsi
• Asic
• Bist
• Mixed Signal
• Low-Power Design
• Ic
• Static Timing Analysis
• Dft
• Primetime
• Functional Verification
• Timing Closure
• Automatic Test Pattern Generation (Atpg)
• Debugging
• Logic Synthesis
• Verilog