Varun Varindani
ASIC Design Verification Engineer at Meta
- Role
- Asic Design Verification Engineer at Meta
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Asic Design Verification Engineer
Aug 2025 — Present · Bengaluru, IN
Contributing to next-generation MTIA chip projects, developing and maintaining verification testbenches.
Education
Indian Institute of Science (IISc)
Master of Technology - MTech, Electrical, Electronics and Communications Engineering
2017 — 2019
Birla Institute of Technology, Mesra
Bachelor of Engineering (B.E.), Electrical, Electronic and Communications Engineering Technology/Technician
2013 — 2017
Skills
- Microprocessors
- C
- Matlab
- Linux
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