Vanthanadevi Kesavan
Verification Engineer
- Role
- Design Verification Engineer at Chiplogic Technologies
- Location
- Vellore, TN, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Vanthanadevi Kesavan
Skills in Digital, System Verilog and UVM. Known protocols: SPI, Serial Nor flash,…
Experience
Design Verification Engineer
Mar 2025 — Present · Bengaluru, IN
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.