Vanarasi Sandeepkumar
Advanced VLSI Design & Verification Trainee at Maven Silicon
- Role
- Internship Trainee at Maven Silicon
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Vanarasi Sandeepkumar
I’m a passionate and detail-oriented VLSI Design & Verification Engineer with hands-on training from Maven Silicon, specializing in advanced verification methodologies such as SystemVerilog, UVM, and assertion-based verification.During my training, I gained real-world experience on industry simulation projects, developing reusable verification environments, writing testbenches for complex digital designs, implementing functional and code coverage, debugging RTL simulation failures, and applying constrained random testing.With a solid foundation in digital electronics and ASIC design, I am eager to contribute to semiconductor innovation, collaborate with high-impact teams, and grow continuously as a verification engineer.Tools & Skills: SystemVerilog | UVM | ASIC Design & Verification | RTL Simulation | Debugging | Functional Coverage | Assertions | Linux | Digital DesignOpen to roles: VLSI Verification Engineer | ASIC Design Engineer | RTL Design Engineer | Front-end Verification
Experience
Internship Trainee
Jul 2024 — Present · Bengaluru, IN
Education
Sreenivasa Inst. of Technology & Management Studies, Thimmasamudram, Chittoor
Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering
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