Vamshi Krishna Radharapu
ASIC Design Verification Engineer at MosChip
- Role
- Asic Design Verification Engineer at MosChip®
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
Experience
Asic Design Verification Engineer
Apr 2023 — Present · Hyderabad, IN
List of Projects1. SPI Responsibilities- Understanding the specification- Defined Verification plan, Architected the class-based verification environment in SV and UVM- Worked on SPI MASTER VIP implementation and verified the SPI SLAVE VIP- Worked on Assertion based verification, Functional Coverage and achieved 100% as a team. eMMC Responsibilities- Understanding the specification- Defined Verification plan, Architected the class-based verification environment in SV and UVM- Worked on eMMC DEVICE VIP implementation and verified the eMMC HOST VIP- Worked on Assertion based verification, Functional Coverage and achieved 100% as a team.3. Ethernet Responsibilities- Defined Verification plan, Architected the class-based verification environment in SV and UVM- Worked on Host Environment which is used to configure the registers- Worked on Memory Environment which will perform transmit & receive data to/from DUT according to write/read operation. Which also verifies the received frame- Worked on Ethernet transmitting agent which transmits the Complete frame to the DUT & verifies the complete frame format- Worked on Ethernet Code, Functional Coverage & Assertions
Education
ACE Engineering College, Hyderabad
Bachelor of Technology - BTech
2018 — 2022
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