Valavala Kishore

About Valavala Kishore

Hi, I am a Physical design engineer with 6+ years of experience.1) Complete exposure to SNPS design implementation tools of Design compiler, Fusion compiler, ICCompilerII.2) Complete exposure to signoff tools of Primetime, ICValidator and redhawk.3) Worked on N2,N4,N5, N6, N7, 14nm, 22nm and Intel 18A projcets with more than 1M instances and more than 1GHZ.4) Worked on Phy circuits of DDR, LPDDR, HBM and HBI deisgns and also CPU deisgns with MV designs.5) Good at TCL scripting6) Good at logs and scripts understanding.

Experience

1. Lead Physical Design Engineer

   HCLTech

   Apr 2025 — Present · Bengaluru, IN

   RTLtoGDSII for the latest designs for the high instance count, very high frequency using the industry standard tools.EDA tools: Design compiler, IC CompilerII, Fusion compiler, ICValidator, Mentor Graphics Calibre and Ansys Redhawk.Working with complex designs with industry standard EDA tool and solving the world class problems.

Education

• National Institute of Technology Calicut

  Master of Technology - MTech, Microelectronics and VLSI

  2018 — 2020

• Vignan junior college kaikaluru

  Intermediate, Mathematics,physics, chemistry

  2006 — 2008

• Zilla parishat high school

  10th Class, 10th Class

  2006 — 2006

• Jawaharlal Nehru Technological University

  Bachelor of Technology - BTech, Electronics and Communications Engineering(76.17%)

  2009 — 2013