Vaishnavi Sahir

About Vaishnavi Sahir

Currently working as Custom CAD Engineer at Apple.Previously worked as an Analog CAD/Design Automation Engineer at MaxLinear.Competencies include: • Pcell development, validation and support• Validating LVS, DRC, PERC verification Rule Decks and customizing it for custom PDKs• Automate tasks using Perl, Python, SKILL, Tcl and Shell • Led the evaluation, implementation, and support of EMIR tools for analog circuits• Worked across multiple technologies including 60nm, 40nm, 28nm, 16nm, 14nm and 5nm with foundries • Work on migration projects between different technologies and metal stacks.Pursued my Masters in Electrical Engineering with focus on VLSI design and Computer Architecture at the University of Southern California, Los Angeles.

Experience

1. Cad Engineer

   Apple

   Oct 2022 — Present · San Diego, CA, US

Education

• University of Southern California

  Master’s Degree, Electrical and Electronics Engineering (VLSI Design and Computer Architecture)

• Dayananda Sagar College of Engineering, BANGALORE

  Bachelor’s Degree, Electrical, Electronics and Communications Engineering

  2008 — 2012

Skills

• Python
• Supply Chain Management
• Cadence Virtuoso
• Microsoft Office
• Simvision
• Visio
• Linux
• Modelsim
• Digital Electronics
• C
• Programming
• Very-Large-Scale Integration (Vlsi)
• Application-Specific Integrated Circuits (Asic)
• Agile Methodologies
• Jcl
• Rtl Design
• Xilinx
• Circuit Design
• Computer Architecture
• C++
• Verilog
• Xilinx Ise
• Matlab
• Windows
• Field-Programmable Gate Arrays (Fpga)
• Objectstar
• Vhdl
• Microsoft Powerpoint