Vaishnavi Udata
Senior Layout Design Engg. at Sankalp HCL
- Role
- Employee at HCLTech
- Location
- Solapur, MH, IN
- LinkedIn followers
- 500 followers
About Vaishnavi Udata
Experienced in Analog Layout Design Engineer working in the semiconductors industry. Projects worked in DDR, HSIO, UCIE & FIVR in latest industry standard technology nodes. Skilled in Layout Verification, Design Rule Checking (DRC), LVS and Layout Design.
Experience
Employee
Jun 2017 — Present · Hubli, IN
Good knowledge of CMOS concepts* Worked with TSMC foundry * Floor planning, power planning, pad ring creation, place & route*Have worked on block level floorplan, place and route, performed LVS and DRC clean* worked on 7nm, 10nm, 45nm technologies
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