Vaideeshwaran V
Analog Layout || VLSI Design and Verification || Skilled in DRC, LVS || Experienced with Cadence EDA Tools & SCL PDK || Passionate about Analog Layout, RTL, DV||VLSI
- Role
- Smartdv Technologies
- Location
- Tiruppur, TN, IN
- LinkedIn followers
- 500 followers
About Vaideeshwaran V
VLSI Design & Verification | Analog Layout | Digital & Analog Expertise I am…
Experience
Present
Education
Dr.Mahalingam College of Engineering and Technology
Bachelor of Engineering - BE
2021 — 2025
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