Vaibhav Chavan
- Role
- Marvell India at Marvell Technology
- Location
- Pune, IN
- LinkedIn followers
- 500 followers
Manufacturing & ProductionView LinkedIn profile
About Vaibhav Chavan
6 Years of Experience in Soc/Block level verification and Formal Verification
Experience
Marvell India
Present
Skills
- Soc
- Verilog
- Vlsi
- Mentor Graphics, Conformal Lec
- Integrated Circuit Design
- Fpga
- Functional Verification
- Physical Design
- Asic
- System Verilog, Verilog,Vhdl, Ovm
- C
- Xilinx
- Rtl Design
- Modelsim
- Xilinx Ise
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