Vaibhav Agrawal

ASIC (Timing) Engineer @ NVIDIA | CSIR-CEERI | BITS-Pilani

Role
Asic Engineer at NVIDIA
Location
Bengaluru, IN
LinkedIn followers
500 followers

About Vaibhav Agrawal

ASIC Engineer at NVIDIA, Bengaluru. SoC Timing - block / top level.

Experience

  1. Asic Engineer

    NVIDIA

    Aug 2022 — Present · Bengaluru, IN

Education

  • Birla Institute of Technology and Science, Pilani - Goa Campus

    Bachelor of Engineering - BE

    2018 — 2022

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Vaibhav Agrawal — Asic Engineer at NVIDIA in Bengaluru, IN | Unifers