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Vadiraj Desai

SoC Design Engineer at Intel

Role
Soc Design Engineer at Intel
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers
EngineeringView LinkedIn profile

Experience

  1. Soc Design Engineer

    Intel

    Aug 2021 — Present · Bangalore Urban, IN

Education

  • Visvesvaraya Technological University

    Bachelor of Engineering

    2004 — 2009

  • VTU

    BE in E&C

Skills

  • I2c
  • Vhdl
  • Modelsim
  • Fpga
  • Lattice
  • Functional Verification
  • 10g Ethernet
  • Ddr3
  • Uart
  • Pcie
  • Chipscope Pro
  • Verilog
  • Ncsim
  • Static Timing Analysis
  • Spi
  • Rtl Design
  • Microblaze
  • Spyglass
  • At Commands
  • Ise
  • Xilinx
  • Debussy

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Vadiraj Desai — Soc Design Engineer at Intel in Bengaluru, KA, IN | Unifers