V V Girish
DV Engineer | Analog Devices | IIT Madras | Wearables
- Role
- Design Verification Engineer at Analog Devices
- Location
- Thiruvananthapuram Taluk, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About V V Girish
Solving the #1 cause of death (Cardiovascular Diseases) through Research and…
Experience
Design Verification Engineer
Aug 2024 — Present · Bengaluru, IN
Education
College of Engineering Trivandrum
Bachelor of Technology
2016 — 2020
Indian Institute of Technology, Madras
Master of Science - MS in Electrical Engineering
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