Utkarsh Kedia
Senior Engineer at Qualcomm | Ex-NVIDIA | BITS Pilani
- Role
- Asic Rtl Design Engineer at Google
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Asic Rtl Design Engineer
Dec 2025 — Present · Bengaluru, IN
Education
Birla Institute of Technology and Science, Pilani
Bachelor of Engineering - BE
2016 — 2021
Birla Institute of Technology and Science, Pilani
Master of Science - MS
2016 — 2021
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