Urso Vargas
- Role
- Silicon Engineer at Google
- Location
- Santa Clara, CA, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Urso Vargas
A highly dedicated and self driven engineer with many years of experience in the…
Experience
Silicon Engineer
Sep 2021 — Present
Designing the next generation of technology. Cosmic Radiation Effect. Silent Data Corruption. Custom Circuit Design for ML/IA. Perf/TCO optimization.
Skills
- Domino Logic
- Timing and Power Optimization
- High Speed Digital
- Soc
- Static Timing Analysis
- Schematic Capture
- Processors
- Cadence Virtuoso
- Physical Design
- Physical Layout Optimization
- Register Files
- Simulations
- Signal Noise Integrity
- Vlsi
- Domino and Static Logic
- Circuit Layout
- Design for Testability
- Debugging
- Logic Design
- Dft
- Post-Silicon Debug
- Ic
- Low-Power Design
- Circuit Design
- Functional Verification
- Microprocessors
- Integrated Circuit Design
- Asic
- Silicon
- Rtl Design
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