Urmil Modi

About Urmil Modi

I\'m a SoC Performance Engineer at Tesla, working at the interface of silicon architecture and low-level software. My day-to-day involves identifying micro-architectural bottlenecks and validating that next-gen AI silicon meets its latency and throughput targets.I have a deep interest in HW/SW co-design, specifically how specialized hardware and low-level software can be optimized in tandem. My work ranges from architecting cycle-accurate cluster models to tuning the memory controller arbiter logic for deterministic tail latency. I focus specifically on how specialized hardware logic can be used to minimize system-level overhead and maximize performance.Technical Stack: C++, SystemVerilog, Python, ARM Assembly, and UVM.Honours University of Toronto Graduate | BASc in Computer Engineering | Certificate in Artificial Intelligence Engineering

Experience

1. Hardware Design Engineer, Autopilot Hardware

   Tesla

   Jun 2024 — Present · Austin, TX, US

   Part of the Autopilot Hardware Performance Team.Focus areas include- SoC-level micro-architectural bottleneck triage- Cycle-accurate performance modeling for AI accelerators- Memory system tuning (LPDDR5/NoC) for deterministic tail latency- HW/SW co-design and specialized hardware logic optimization.

Education

• University of Toronto

  Bachelor of Applied Science - BASc with Honours, Computer Engineering

• North Park Secondary School

  Ontario Secondary School Diploma

  2014 — 2018