Unmesh Khadilkar
Principal Verification Engineer, Nvidia
- Role
- Principal Verification Engineer, Networking Chip Design at NVIDIA
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
Experience
Principal Verification Engineer, Networking Chip Design
Oct 2023 — Present · Bengaluru, IN
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Skills
- Uvm
- Functional Coverage
- Soc Verification
- Low Power Verification
- Register Verification Using Uvm Reg
- Verification Planning
- Verification Closure
- Spyglass Low Power
- System Verilog Assertions
- Gate Level Simulation
- Upf
- Cpf
- System Verilog
- Perl
- Soc Verification Management
- Code Coverage
- Formal Verification
- Emulation
- Functional Verification
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