Umesh Pratap
SMTS-SoC verification and design -AMD Delhi
- Role
- Smts -soc Verification Amd Delhi at AMD
- Location
- Faridabad, HR, IN
- LinkedIn followers
- 500 followers
About Umesh Pratap
several years of experience in ASIC Design and Verification. Expertise in Digital Design, C/GLS Design & RTL coding for SoC/SoM verification using System VHDL and UVM Methodologyexperience in PCIe and arm coresight debug.like to work where team work is appreciated over individual.
Experience
Smts -soc Verification Amd Delhi
Aug 2024 — Present · Delhi, IN
SOC verification and design for Network chips.
Education
Ymca , Faridabad
Bachelor of Technology (B.Tech.), Electronics and Communications Engineering
2010
Skills
- Verilog
- Asic
- Vlsi
- Verilog , System Verilog, Uvm, C, C++
- Systemverilog
- Rtl Design
- C++
- Vhdl
- Functional Verification
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