Uma Garikapati

About Uma Garikapati

Experienced Application Specific Integrated Circuit Design Engineer with a demonstrated…

Experience

1. Eda Tools Software Engineer

   Intel

   Jan 2022 — Present

   Develop and maintain standard cell and custom cell characterization flow using Siliconsmart and Liberate AMS tools. PnR execution on multiple blocks from netlist to GDS including floorplanning, CTS, timing closure physical and electrical verification.Develop and maintain Conformal ECO flow to help designers make RTL changes after PnR.Develop and maintain QA checks for quality control on standard cell and custom library collaterals. As part of this I have worked on developing a flow using Fractal Crossfire tool. Logic equivalency check using Conformal LEC utility.Enhance and maintain icc2 RDT flows by adding procedures to the existing flow to help reduce manual debugging and block optimization.Developed pre-characterization checks on schematics and layouts using Skill language. This helps control the quality of inputs given to the characterization flow without any manual debugging.Full chip timing analysis automation flow which includes netlist generation, lef/def generation, extraction and running PT.Developed a standalone library characterization flow along with AOCV characterization and device gate length width change according to user input which enabledthe team to evaluate the results without going through the exhaustive process of creating new schematics and layouts for the cells. This helped the design team savelot of manual effort of creating new schematics and layouts for each test case.

Education

• University of Southern California

  Master of Science, Electrical Engineering

  2016 — 2018

• Andhra University

  Bachelor's degree, Electrical, Electronics and Communications Engineering

  2012 — 2016

Skills

• Microsoft Excel
• Microsoft Office
• Project Management
• Public Speaking
• Customer Service
• Research
• Leadership
• Management
• Microsoft Powerpoint
• Microsoft Word