Ullas S
IP Logic Design Engineer | Intel | MIT \'22
- Role
- Ip Logic Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Ip Logic Design Engineer
Aug 2022 — Present · Bengaluru, IN
Education
Pace PU College, Shimoga
Pre-University
2014 — 2016
Jawaharlal Nehru National College of Engineering
Bachelor of Engineering - BE
2016 — 2020
Manipal Institute of Technology
Master of Technology - MTech
2020 — 2022
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