Ujwala M.
Lead Verification Engineer at NXP Semiconductors
- Role
- Lead Verification Engineer at NXP Semiconductors
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
Experience
Lead Verification Engineer
Jan 2016 — Present · Austin, TX, US
Education
Birla Institute of Technology and Science, Pilani
B.E., Electrical and Electronics Engineering
Birla Institute of Technology and Science, Pilani
M. E., Micro Electronics
Skills
- Vlsi
- Digital Signal Processors
- Physical Design
- Timing Closure
- Ic
- Formal Verification
- Semiconductors
- Dft
- Tcl
- Hardware Architecture
- Logic Synthesis
- Logic Design
- Verilog
- Microarchitecture
- Systemverilog
- Embedded Systems
- Eda
- Asic
- Debugging
- Functional Verification
- Computer Architecture
- Rtl Coding
- Integrated Circuit Design
- Microprocessors
- Processors
- Microcontrollers
- Cmos
- Low-Power Design
- Arm
- Soc
- Rtl Design
Find verified contacts for anyone on LinkedIn
Unifers gives sales teams verified emails and direct dials, enriched profiles, and outreach that lands in the inbox.
Free plan included · No credit card required
This profile is compiled from publicly available professional sources. Unifers is not affiliated with or endorsed by LinkedIn. Request removal of this profile.