Uday Venkatesh
SoC Design Engineer | Intel Corporation
- Role
- Soc Design Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Uday Venkatesh
SOC Verification Engineer with 6 years of experience specializing in DFX and DFT methodologies. Proven ability in mentoring and leading junior peers, fostering collaboration within teams. Trained in System Verilog, UVM, and possesses a solid foundation in basic electronics. Holds a degree in Electronics and Communication.
Experience
Soc Design Engineer
Sep 2021 — Present · Bengaluru, IN
Education
Sheshadripuram Composite PU college
PUC, PCMB
2011 — 2013
Sambhram Institute of Technology, BANGALORE
Bachelor of Engineering, Electrical, Electronics and Communications Engineering
2013 — 2017
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