Tushar Vaswani
SOC Design Verification Engineer | INTEL
- Role
- Cpu Design Verification Engineer at Intel
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Tushar Vaswani
A competent professional with total experience of around 5 years in Asic Design and Verification and the experience is broadly classified into the following categories:Deep understanding on HDVL like System Verilog and Pre Silicon Verification Good in RTL Design Concepts using VerilogHands on experience and Good understanding on Protocols like AHB, APB, I2C, USB, and PCIeKnowledge of UVM/OVM methodologies and hands on experience in building verification environmentsPosses Great Debugging SkillsExperience in Coverage Analysis and Functional ClosureExcellent Scenario/Test Plan creation and Testbench generation Capabilities Exceptional Automation Test generation skills using ScriptingExperience on technologies like Low Power, UPF, XPROP, MSIE, XFORMAdditional Skills:Experience in working in Hardware Design for Consumer ElectronicsHands on experience in working on Consumer products from scratch from Circuit Creation to PCB manufacturingExceptional bug finding capabilities using Bash/TCL ScriptingMore Facts:Great in collaboration with different teams.Having Good Communication and Problem solving skillsAbility to Connect the dots to my past experience for better Verification
Experience
Cpu Design Verification Engineer
May 2024 — Present · Bengaluru, IN
Bengaluru, Karnataka, India
Education
Shri Vaishnav Vidyapeeth Vishwavidyalaya, Indore
Bachelor of Technology - BTech
2016 — 2020
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