Tung Hoang
ASIC Design Engineer
- Role
- Sr Staff Engineer at Samsung Semiconductor
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Tung Hoang
Skills- Deep learning, AI acceleration (in-memory computing)- Non-volatile memory (RRAM, MRAM, SSD) controller design- NoC IP design and NoC-based SoC integration- Modeling and hardware/software co-design for accelerator-centric heterogeneous architectures- Energy-efficient hardware design (specialized IP, power reduction techniques etc.)- ASIC/FPGA design flow
Experience
Sr Staff Engineer
Apr 2023 — Present · San Jose, CA, US
Building specialized, coherent fabric for mobile Exynos SoC flagships (architecture definition, RTL design, and PPA optimization, multiple tape-outs in advanced 2/3nm nodes)
Education
Korea University
M.Sc, Microelectronic
2004 — 2007
Chalmers University of Technology
PhD, Computer Engineering (VLSI design)
2007 — 2013
Hanoi University of Science and Technology
B.Sc, Electronic and Telecommunication
1998 — 2003
Skills
- Circuit Design
- Eda Tools
- Digital Electronics
- C
- Vlsi
- Ic
- Cmos
- Rtl Design
- Python
- Power Reduction Techniques
- Device Physics
- Cadence Virtuoso
- Digital Circuit Design
- Microelectronics
- Signal Processing
- Matlab
- Electronics
- Soc
- Computer Architecture
- Digital Design
- Integrated Circuit Design
- Microprocessors
- Dsp
- C++
- Algorithms
- Semiconductors
- Hardware Design
- Characterization
- Hardware
- Linux
- Modelsim
- Tcl
- Verilog
- Vhdl
- Digital Signal Processors
- System Design
- Fpga
- Embedded Software
- Asic
- Embedded Systems
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