Tulika Sinha
Senior RTL Design Engineer | R&T | RISC-V CPU Design | Micro Architecture Development | Safety critical Processor Design
- Role
- Senior Engineer at Thales
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Tulika Sinha
RTL Design Engineer with 6 years of experience specialising in RISC-V based processor…
Experience
Senior Engineer
Mar 2024 — Present · IN
Education
Dayananda Sagar College of Engineering, BANGALORE
Bachelor of Engineering - BE, Electrical, Electronics and Communications Engineering
2015 — 2019
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