Tsairong Chih
Hardware Validation Engineer @ Astera Labs
- Role
- Hardware Electrical Validation Engineer at Astera Labs
- Location
- San Jose, CA, US
- LinkedIn followers
- 500 followers
About Tsairong Chih
Board-Level Validation EngineerHands-on experience with oscilloscope measurements, debugging, and automated validation workflows. Passionate about solving complex hardware issues and improving system reliability.
Experience
Hardware Electrical Validation Engineer
Feb 2025 — Present · San Jose, CA, US
Create test plans, lead PCBA board bring-up, and execute validation plan• Report bugs and propose corrective actions in collaboration with the design team,driving resolution of critical hardware and system-level issues • Build reusable automated test framework in Python for validation such as voltage margining
Education
San José State University
Electrical Engineering
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