Tripti Bedwal

Engineer I @Synopsys | VLSI Engineer

Role
Engineer i at 新思科技股份有限公司
Location
Bengaluru, KA, IN
LinkedIn followers
500 followers

About Tripti Bedwal

Design Verification - Verification environment, Functional Coverage, Digital Design2. Coding-Verilog, System Verilog, Python.3. UVM.

Experience

  1. Engineer i

    新思科技股份有限公司

    Nov 2025 — Present · Bengaluru, IN

Education

  • Manipal University Jaipur

    Bachelor of Technology - BTech, Electronic and communication engineering

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Tripti Bedwal — Engineer i at 新思科技股份有限公司 in Bengaluru, KA, IN | Unifers