Tim Sperber
ASIC Digital Design Architect at Synopsys
- Role
- Asic Digital Design Architect at Synopsys Inc
- Location
- Boston, MA, US
- LinkedIn followers
- 500 followers
About Tim Sperber
I am an experienced design verification engineer with a strong background in DDR PHY IP verification and SSD controller ASIC development. As an IP verification engineer I have shown leadership skills and I have a proven record of success in interacting with management and partner teams to resolve complex issues. I have led IP verification teams, mentored engineers, and reviewed specifications to ensure compliance and quality. With my strong track record of validating memory controller physical interfaces for Intel Xeon and Itanium microprocessors I have demonstrated adaptability and a commitment to achieving high standards in complex design environments.Leadership | Design Verification | Team Collaboration | Problem Solving | Specification Review | Mentoring | Process Improvement
Experience
Asic Digital Design Architect
Sep 2025 — Present · Boxborough, MA, US
Education
University of Cincinnati
BS, Computer Engineering
1992 — 1997
Skills
- Validation
- Perl
- Simulation
- C++
- Python
- C
- Verilog
- Simulations
- Asic
- Debugging
- Microprocessors
- Testing
- Computer Architecture
- Intel
- Processors
- Semiconductors
- Functional Verification
- Hardware Architecture
- Unix
- Specman
- Ic
- Firmware
- Microarchitecture
- Systemverilog
- Dft
- Uvm
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