Timothy Ehrler
Sr. Manager Systems Engineering, Engineering Grid IT, at AMD
- Role
- Sr Manager Systems Engineering Pmts, Design Infrastructure Enablement, Engineering Grid IT at AMD
- Location
- Austin, TX, US
- LinkedIn followers
- 500 followers
About Timothy Ehrler
PMI certified project manager & Senior Member with extensive engineering, management, and liaison expertise among senior management, technology partners, & industry coalitions, with proven expertise in architecture and development of semiconductor design methodologies and software applications. • Managed the relocation of EDA tool license services for primary services & disaster recovery, including infrastructure replacement and associated s/w & licensing • Managed the EDA tool licensing services management system upgrade including infrastructure replacement and associated license & daemon migration • Managed the major issue management system upgrade including all infrastructure, networking, and associated application software and database migration • Managed comprehensive evaluation of the enterprise IP, knowledge management, and defect/issue infrastructure by assessing the design process from requirements to implementation enabling informed recommendations and strategic decisions in the area of PLM/tools/services/etc • Project leadership for re-architecture and integration of existing and acquired design flows within the Sea-of-IP design environment enabling IP creation, management, distribution, interoperability, and reuse • Managed the planning, implementation, and delivery of a relative-placement tool for 45nm node semiconductor designs after assuming management of previously troubled, nonviable project efforts • Project management and co-architecture of 90nm CMOS SoC Design Environment supporting >6700 engineers world-wide and contributing to >EUR 4.6 billion in sales • Leadership role for adoption of OpenAccess design database across design environments, providing formal project management that improved interoperability and IP reuse targeting 65nm CMOS technology • Coordinated efforts between technology groups, Crolles Alliance (Philips, STMicroelectronics, and Freescale), and EDA vendors to ensure consistent OpenAccess design database interoperability
Experience
Sr Manager Systems Engineering Pmts, Design Infrastructure Enablement, Engineering Grid IT
Dec 2014 — Present · Austin, TX, US
Manage team responsible for enabling design engineering access, availability, & use of EDA tools within the engineering development environment, including EDA vendor relationships & procurement, tool & license management, Linux utilities, and compute grid & storage allocation management.
Education
The Ohio State University
Bachelor Science, Computer & Information Science, College of Engineering
1973 — 1977
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