Thirupathi Rayudu Karanam
Analog Layout Engineer at Sankalp Semiconductor(An HCL Company)
- Role
- Design Engineer at HCLTech
- Location
- Bengaluru, IN
- LinkedIn followers
- 500 followers
About Thirupathi Rayudu Karanam
5+ years of experience in Analog Layout Design - Experience in layout designs in TSMC 22nm, 28nm, 45nm, 65nm, 90nm, 130nm, 14nm FINFET, UMC40nm process nodes- Exposure with Cadence Tool set & Features: Cadence Virtuoso L/XL, Physical Verification tools: Assura & Calibre- Have Experience in layout designing of SERDES, PLL, ADC, DAC, LDO, BGR, Comparator, Two stage Amplifier (Op-amp), Buffers, Standard cell Developments - Handled High Speed Layout design of various blocks like TX, RX blocks, PLL,SERDES- Having experience in estimating the Area and power routing and placement in TOP level- Able to design the layouts by following ESD and Latch-up rules with proper floor planning, Layout Verification- Expert in debugging DRC, LVS, Matching devices with compact area - Capable to design area & route efficient layouts with less parasitic/complexity/ delay/coupling/EM etc- Proficient in IC verification checks like DRC, LVS, Antenna Checks, Sheilding - Knowledgeable with IR Drop, Electro-migration, Crosstalk, Latch-Up, ESD, Antenna Effect, WPE, basics of Deep N-Well, STI effects-
Experience
Design Engineer
Sep 2021 — Present
Education
St. Ann's College of Engineering and Technology
Bachelor of Technology (B.Tech.), ECE
2010 — 2014
SRM University
Master's degree
2014 — 2016
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