Thejaswini S
FPGA Design & Verification Engineer @capgemini
- Role
- Fpga Design & Verification Engineer at Capgemini Engineering
- Location
- Thanjavur, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Thejaswini S
As a VLSI Design & Verification Trainee at Maven Silicon, I am actively building my…
Experience
Fpga Design & Verification Engineer
Sep 2025 — Present · Chennai, IN
Education
K.Ramakrishnan College of Engineering
Bachelor of Engineering - BE
2021 — 2025
K.Ramakrishnan College of Engineering
Bachelor of Engineering
2021 — 2025
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