Theertharamesha L C

About Theertharamesha L C

A passionate, creative designer in the semi-conductor field. I have more than 6 years of professional experience in VLSI domain. I have worked from the startup company to a well-established company so which gave me varied insights how the growth of person and company can improve one\'s ability and could contribute effectively. I believe that I have the potential to do much more than my profiles say. I am looking for great opportunities to show case my skills and knowledge. Specialties: Proficient in prototyping FPGA designs Expert in RTL design Flow & synthesis Adequate knowledge in Xilinx FPGA development tools, board design, debugging and testing Good knowledge and working experience in protocols like AXI, I2C, SPI, UART Experienced in using multiple EDA tools from different vendors Experienced in creating Emulation RTL models for Zebu and Veloce Platform Good experience in Emulation Compile time and Runtime environments including Emubuild and SIMICS Experience In interfacing Transactors to the emulation models. Worked on transactor Integration like Pcie, NAND Flash, UART, DDR & CPU tracer xtors Good knowledge and experience about SOC and ARM ArchitectureArea of Interest: Digital System Design VLSI Design Embedded System Design IP design & verification FPGA EMULATIONSkill Set: Hardware Description Language: Verilog Technologies & FPGA Boards: Xilinx ZYNQ 7020, Xilinx SVDK, FPGA prototyping, Zed board EDA Tools: XILINX ISE, Vivado, QUARTUS II, MODEL SIM, QUESTASIM Emulador: Veloce & Zebu Emulation Tools: Pathbrowser, Visualizer, VERDI, zRun, zCui Debugging tool: Xilinx Chipscope Protocols : SPI, I2C, UART, AMBA – AXI, PCIeLanguages:English: Business FluentKannada: Mother TongueTelugu: Intermediate

Experience

1. Emulation Engineer

   Intel

   Feb 2022 — Present

Education

• REVA INSTITUTE OF TECHNOLOGY AND MANAGEMENT

  Bachelor of Engineering - BE, ELECTRONICS AND COMMUNICATION

  2008 — 2012

• careers for BANGALORE

  Master of Technology - MTech, VLSI&EMBEDDED SYSTEM

  2012 — 2014