Telkar Sai Gopichand
VLSI Design Verification | Gate Level Simulation | Capgemini Engineering
- Role
- Analyst A4 at Capgemini Engineering
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Telkar Sai Gopichand
Passionate & self-motivated individual with a keen interest in VLSI, equipped with strong problem solving skills and a commitment to continuous learning new things. Eager to secure an entry level position in the semiconductor industry as a Design and Verification Engineer in IP/ASIC/SOC Design flows. Where i can apply my knowledge towards innovative cutting edge technologies\"
Experience
Analyst A4
Mar 2025 — Present · Bengaluru, IN
Education
New Horizon College of Engineering
Bachelor of Engineering - BE
2019 — 2023
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