Tejinder Kumar

About Tejinder Kumar

System & RTL Architect | FPGA, Emulation, STA, validation | MIPI, Storage, Video & High-Speed Serial Link ExpertWith 18 years of experience (including my M.Tech), I have deep expertise in FPGA-based platform development, System/RTL architecture, and technical leadership across multiple domains such as MIPI, high-speed serial links, storage, Video and speed adapters/bridges.Filed 10+ patents and authored numerous technical publications.I specialize in architecting and developing FPGA-based Speed Adapters (SAs) for high-speed protocols such as MIPI CSI/DSI, DisplayPort, and 5G enabling emulation-based interaction with real-time devices. These solutions are successfully deployed by tier-1 semiconductor and consumer electronics companies, enabling production-level validation and bring-up of high-speed SoC interfaces.Served as the NVMeoF & RDMA solution expert, leading the design and validation of the solution on the Alveo U50 FPGA board, integrating Celestica JBOF and Samsung SSDs. Successfully demonstrated the platform to the CEO during the XCITE event at Trident, Hyderabad.Designed Xilinx Storage Aggregation Platform on Molex 250S+ FPGA to virtualize NVMe SSDs with SR-IOV-like PCIe access for multi-VM environments. Innovated low-latency arbitration techniques, enabling software-free access and improved throughput.I also have deep expertise in the architecture and design of robust FPGA-based platforms for validation and bring-up of high-speed PHYs, including USB 2.0 ULPI/UTMI, MIPI MPHY, HDMI PHY, and Ethernet PHY.Collaborate with cross-functional teams and customers to bridge requirements and specifications, ensuring successful deployment and integration.Lead a team of engineers, driving technical innovation and aligning project goals with organizational objectives.Provide technical support, hands-on development, and mentorship to enhance team productivity and individual growth.

Experience

1. Principal Engineer

   Synopsys Inc

   Feb 2025 — Present · Hyderabad, IN

   Lead a team of 5-6 engineers specializing in the architecture and development of FPGA-based Speed Adapters (SAs) for high-speed protocols such as MIPI CSI/DSI, DisplayPort, and 5G- Speed Adapter enables emulation-based interaction with real-time devices, supporting pre-silicon validation and bring-up of advanced SoC interfaces- Successfully deployed Speed Adapter solutions at tier-1 semiconductor and consumer electronics companies worldwide- Filed three patents in speed adapter technology, demonstrating a strong commitment to innovation and advancing high-speed interface validation- Collaborate with cross-functional teams and customers to bridge requirements and specifications, ensuring seamless deployment and integration- Drive technical innovation and align project goals with organizational objectives- Provide hands-on development, technical support, and mentorship to enhance team productivity and individual growth.

Education

• Thapar Institute of Engineering & Technology

  M.Tech, VLSI

• Shaheed Bhagat Singh State University (SBSSU), Ferozepur

  B.Tech, Electrical, Electronics and Communications Engineering

Skills

• Fpga
• Asic
• Cmos
• Static Timing Analysis
• Dft
• Rtl Design
• C
• Mipi Mphy
• Mixed Signal
• Field-Programmable Gate Arrays (Fpga)
• System on a Chip (Soc)
• Eda
• Digital Design
• Verilog
• Semiconductors
• Physical Layer
• Vhdl
• Post Silicon Validation
• Application-Specific Integrated Circuits (Asic)
• Integrated Circuit Design
• Energy Efficient Ethernet
• Xilinx Ise
• High Speed Serial Links
• Clock Domain Crossing
• Vlsi
• Usb
• Soc