Tejesh Ejanthkar
Director, SoC Lead - Client/SemiCustom/DataCenter Technologies & Engineering at AMD
- Role
- Director Silicon Design Engineer at AMD
- Location
- Hyderabad, TG, IN
- LinkedIn followers
- 500 followers
Experience
Director Silicon Design Engineer
Feb 2012 — Present · Hyderabad, IN
Education
Birla Institute of Technology and Science, Pilani
Bachelor's degree
2002 — 2006
Skills
- Constraint Analysis
- Debugging
- Budget Constraints
- Semiconductors
- Logic Synthesis
- Very-Large-Scale Integration (Vlsi)
- C
- Verilog
- Equivalence Checking
- Application-Specific Integrated Circuits (Asic)
- Integrated Circuits (Ic)
- System on a Chip (Soc)
- Rtl Design
- Static Timing Analysis
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