Tejashwee Singh
Logic Design Engineer
- Role
- Logic Design Engineer at IBM
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Tejashwee Singh
Languages : Verilog, SystemVerilog.2. ARM based SoC Architecture.3. RTL Lint, CDC, Synthesis, LEC, GLS.4. AMBA AXI, AHB, APB, PCS.5. Codec 4k H.264, DMA.
Experience
Logic Design Engineer
Jan 2025 — Present · Bengaluru, IN
Education
Punjab Technical University
Bachelor of Technology - BTech
2013 — 2017
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