Tejas Golhar
R&D Engineer | Hardware Design
- Role
- Electronics Engineer at LAT Aerospace
- Location
- Wardha, MH, IN
- LinkedIn followers
- 500 followers
About Tejas Golhar
Hii, I am Tejas, building LATMy experience involves FPGA-based design, Verilog RTL development, signal processing, and hardware modeling, building a strong foundation in designing reliable, high-performance digital hardware under real-world constraints.My core interest lies in frontend RTL design and verification of complex digital architectures.I am particularly motivated to work on SoC-level datapath and control-flow design, focusing on efficient integrations tailored to constrained product requirements such as power, latency, and throughput.Looking ahead, I would love to contribute to the design of computer vision and machine learning accelerators, bridging algorithmic workloads with scalable and optimized hardware architectures.
Experience
Electronics Engineer
Feb 2026 — Present · Gurugram, IN
Education
Janta High School and Junior College, Deoli, Wardha
10+2, General Science
Government College Of Engineering Chandrapur
Bachelor of Engineering - BE, Electronics and Telecommunication Engineering
Janta High School and Junior College, Deoli, Wardha
10, Semi English
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