Tarush Garg
Aspiring VLSI engineer | Electronics & VLSI @IIITD
- Role
- Undergraduate Researcher at Advanced Multicore Systems Lab, Iiit Delhi
- Location
- New Delhi, DL, IN
- LinkedIn followers
- 500 followers
Experience
Undergraduate Researcher
Advanced Multicore Systems Lab, Iiit Delhi
Jan 2025 — Present · New Delhi, IN
Working under the guidance of Dr. Sujay DebEnhanced a RISC-V processor for a general-purpose microcontroller with modular features for edge computing. Validated functionality on FPGA and completed the RTL-to-GDS flow, including synthesis, timing analysis, and physical design.
Education
Indraprastha Institute of Information Technology, Delhi
Bachelor of Technology - BTech
2022 — 2026
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