Tarush Aggarwal
CPU Logic Design Engineer at Intel | Ex - RIL
- Role
- Cpu Logic Design Engineer at Intel
- Location
- Chandigarh, CH, IN
- LinkedIn followers
- 500 followers
EngineeringView LinkedIn profile
About Tarush Aggarwal
DFT engineer at Intel, willing to expand my knowledge base in VLSI industry. Worked in SD…
Experience
Cpu Logic Design Engineer
Aug 2022 — Present · Bengaluru, IN
Education
Thapar Institute of Engineering and Technology, Patiala
B.E.
2014 — 2018
Thapar Institute of Engineering & Technology
Postgraduate Degree
2020 — 2022
Shri Guru Gobind Singh Collegiate Public School, Chandigarh
Non-medical
2011 — 2013
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