Tarun M R
VLSI & Physical Design | Low-Power CMOS & Reversible Logic | RTL → GDS Flow | Cadence Virtuoso | SystemVerilog
- Role
- Intern at Suprmentr
- Location
- Bengaluru, KA, IN
- LinkedIn followers
- 500 followers
About Tarun M R
Final-year Electronics and Communication Engineering student with a focused interest in VLSI and Physical Design, and hands-on experience in low-power CMOS and Reversible logic–based digital design.Experienced in RTL design, static timing analysis (STA), and SystemVerilog-based verification, with practical exposure to Cadence Virtuoso, Genus, and Innovus through end-to-end RTL → GDS implementation projects. Key work includes ALU optimization, formal verification of FIFO designs, and low-power I2C controller implementation.Actively pursuing opportunities in Digital ASIC design and semiconductor backend engineering, with a strong interest in building scalable, power-efficient hardware architectures.
Experience
Intern
Jan 2026 — Present
Artificial Intelligence with Cloud Computing in Partnership with Nasscom Future Skills
Education
JYOTHY INSTITUTE OF TECHNOLOGY, BANGALORE
BE, Electronics and communication
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