Tarun Khurana
Founder & CEO - Nextgen Chip Design @Nextgen Chip Design
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WORK HISTORY
Founder & CEO - Nextgen Chip Design @Nextgen Chip Design
Founder and CEO of NextGen Chip Design, a specialist ASIC physical design company helping semiconductor teams deliver reliable silicon by accelerating chip tapeouts — on time and on budget. Built and lead a focused team of ASIC physical design specialists Delivered 10+ successful tapeouts across SoCs, subsystems, and IPs Supported start-ups, mid-tier companies as well as global semiconductor brands Engaged as a full-ownership delivery partner or integrated seamlessly with internal teams as per requirements Built reputation for predictable execution, clear communication, and delivery accountability Trusted by clients to de-risk schedules and achieve tapeout readiness without last-minute surprises
EDUCATION
Netaji Subhas Institute of Technology
B.E., Electronics & Communication
SKILLS
ABOUT TARUN KHURANA
I’m the Founder & CEO of NextGen Chip Design, providing accountable physical implementation for semiconductor companies preparing for tapeout.Prior experience includes working with and delivering silicon and 50+ tapeouts for global names like Intel, NXP, Infineon and many startups ASIC physical design teams at times suffer from unpredictable tapeouts driven by late-stage surprises or inadequate early risk visibility.Timing closure rarely fails because tools are bad.It fails because decisions were wrong — too early, too late or without ownership.Hiring a PD team too soon can hurt you.Hiring too late can kill your schedule.Throwing more engineers at the problem often makes it worse.Milestones slip, integration risks emerge late and accountability becomes unclear.Across 25+ years and 50+ tapeouts at leading semiconductor companies and multiple startups, I’ve seen how implementation risk increases when physical design is fragmented across individual contractors without clear delivery ownership. NextGen was established to address this execution gap.We deliver senior-led physical implementation through carefully assembled teams of experienced PD engineers operating under a unified delivery framework. Rather than augmenting headcount, we take structured ownership of execution from RTL through sign-off, working alongside internal teams while maintaining accountability for schedule, quality and tapeout readiness.This approach gives growing fabless teams access to scalable implementation capability without permanent team expansion, while ensuring delivery is led by senior engineers with direct tapeout experience.If you\'re planning a tapeout and require accountable implementation leadership, let’s connect. DM \"Silicon\" to me.
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