Er. Tarak Patel
BVM EC\'23 | Digital Electronics | Verilog | SystemVerilog
- Role
- Intern at Microcircuits Innovations Private Limited
- Location
- Bhavnagar, IN
- LinkedIn followers
- 500 followers
About Er. Tarak Patel
As a recent graduate with a Bachelor\'s degree in ECE Engineering and a strong passion for RTL (Register Transfer Level) Frontend Design, I am eager to embark on a dynamic career in the field. My academic coursework and hands-on projects have equipped me with foundational knowledge in digital circuit design, Verilog programming, and FPGA synthesis. I am a quick learner, detail-oriented, and possess excellent problem solving skills. My goal is to contribute my enthusiasm and technical skills to a forward thinking organization in the semiconductor or hardware design industry, where I can grow and thrive as an RTL Frontend Design engineer.
Experience
Intern
Microcircuits Innovations Private Limited
Jul 2024 — Present
Education
Birla Vishvakarma Mahavidyalaya
Bachelor of Engineering - BE
2019 — 2023
L.D. College of Engineering
Master of Engineering - MEng
2023 — 2025
Gyanmanjari Vidyapith
HSC
2017 — 2019
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