Tapish Meshram

About Tapish Meshram

I am thrilled to embark on what feels like a significant leap in my career journey as I\'ve recently become a member of the Formal Verification Central Tech Office (FVCTO) at Intel.My academic background includes pursuing a Master of Technology (MTech) in VLSI and Microelectronics (Solid State Devices) at the prestigious Indian Institute of Technology Bombay (IIT Bombay), which has greatly enriched my academic prowess.Prior to my academic pursuits at IIT Bombay, I gained valuable hands-on experience during my two-year tenure as a professional in the field of Digital Design. During this time, I had the privilege of contributing to India\'s renowned geolocation system, the Indian Regional Navigation Satellite System (IRNSS), in my role as an RTL design engineer. My responsibilities encompassed a wide array of tasks, including Verilog logic development, PS-PL coprocessing, IP integration, timing analysis, testing, verification, security enhancements, and area management for custom System-on-Chip (SOC) boards powered by Xilinx\'s dual-core Zynq SOCs. This experience not only honed my technical skills but also fostered the growth of my interpersonal abilities, such as effective written and verbal communication, relationship management, and a goal-driven mindset.Furthermore, my undergraduate project was conducted in collaboration with the Tata Institute of Fundamental Research (TIFR) and the Indian Space Research Organization (ISRO). In this endeavor, I played a pivotal role in developing a portable and robust Spectrometer aimed at facilitating material recognition during on-field research activities. This project involved the utilization of the Xilinx Artix-7 FPGA and the implementation of VHDL as the programming language.I am excited to bring my diverse skill set and experiences to the FVCTO team at Intel and continue contributing to cutting-edge technology solutions.

Experience

1. Formal Verification Engineer

   Intel

   Jul 2021 — Present · Bengaluru, IN

   Formal verification has time and again been proving to be an essential step in the digital design environment, and so I am elated to be a part of FVCTO, Intel.

Education

• Indian Institute of Technology, Bombay

  Master of Technology - MTech, Solid State Devices

  2019 — 2021

• Bishop Cotton High School

  Matriculat

  2004 — 2011

• Vishwakarma Institute of Information Technology

  B.E., Electronics and

  2013 — 2017